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If you already have a Candidate Account, please Sign-In before you apply.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability or protected veteran status.Job Description:The Network Switch Group at Broadcom has brought some of the most complex and cutting edge networking ASIC's and multi-chip solutions to market over the last decade.
The group develops ASIC's for L2/L3 switch routing.
These products support the latest networking protocols and features as well as manage extremely large volumes of traffic of the order of several Terabits/sec.You will be responsible for the micro-architecture, design, RTL coding, debugging and synthesis of complex functional blocks in the Traffic Manager / Memory Management Unit used in Broadcom’s market leading network switch products.Responsibilities include:High quality micro-architecture and design specificationsVerilog RTL coding and synthesisTestplan reviews, assertions, debugging, code and functional coverageFloor plan, timing, congestion resolution with Physical Design teamPost silicon bring-up, debug, failure analysis.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.